1. Field of the Invention
The present invention relates to a thin film transistor (TFT) liquid crystal display (LCD), and more particularly, to a source driver output circuit for a TFT LCD.
2. Description of the Related Art
In order to drive a panel of a thin film transistor (TFT) liquid crystal display (LCD), the TFT LCD generally includes a gate driver for driving gate lines (alternatively referred to as row lines) of the TFT and a source driver for driving source lines (alternatively referred to as column lines) of the TFT. If the gate driver applies a high voltage to the TFT LCD, and thereby the TFT is turned on, the source driver applies source drive signals for indicating colors to source lines, respectively and thereby an image screen is displayed on the LCD.
FIG. 1 illustrates a conventional source driver output circuit. Referring to FIG. 1, an output circuit 100 of a source driver receives an input voltage INP1 so as to supply source drive signals for indicating colors to a panel (not shown). In such a case, an input voltage INP1 having a high level is input once, and an input voltage INP1 having a low voltage is input once. That is, an input voltage INP1, having a voltage higher than a reference voltage, is input once, and an input voltage INP1, having a voltage lower than the reference voltage, is input once on the basis of a predetermined reference voltage. The input voltage INP1 input to the source driver output circuit 100 is applied to a voltage generator 110, for example comprising a voltage follower. The input voltage INP1 input to the source driver output circuit 100 usually contains a relatively small amount of current, and thus is converted into a voltage having a larger amount of current at the same voltage level by the voltage follower 110.
A voltage output from the voltage follower 110 passes through a switch 120 and is generated as an output voltage OUT1. In this case, the switch 120 is turned off so that the input voltage INP1 is not output during the short time duration during which the the level of the input voltage INP1 is varied. If the level of the input voltage INP1 is rapidly varied, then the output voltage OUT1 is rapidly varied. This variation affects the quality of images produced on the panel (not shown), for example causing noise or trembling in the images. In order to prevent noise or trembling in images, the switch 120 is turned off for the short time period during which the level of the input voltage INP1 is varied.
The switch 120 is comprised of a PMOS transistor that is turned on or off by applying a control signal SW1 to a gate thereof, and a NMOS transistor that is turned on or off by applying an inverted control signal SWB1 to a gate thereof.
FIG. 2 is a timing diagram illustrating the operation of the source driver output circuit of FIG. 1. Referring to FIG. 2, the control signal SW1 transitions to a high level during the time period in which the level of the input voltage INP1 is varied. When the control signal SW1 is at a high level during interval H-Z, the switch 120 is turned off, and thus, the input voltage INP1 is not generated as the output voltage OUT1. An oblique portion of the waveform of the output voltage OUT1 during this time span represents a high-impedance state.
FIG. 3 illustrates modeling of a panel of a thin film transistor (TFT) liquid crystal display (LCD) that is connected to an output voltage OUT1. Referring to FIG. 3, a panel 300 is comprised of resistors R1, R2, and R3, and capacitors C1, C2, and C3. The respective resistors R1, R2, and R3 have different resistance values, and the respective capacitors C1, C2, and C3 have different capacitance values.
The input voltage INP1 input to the panel 300 is distributed to charge the capacitors C1, C2, and C3 according to the different resistance values of the resistors R1, R2, and R3, and the different capacitance values of the capacitors C1, C2, and C3.
However, it is a common goal among TFT LCD designs to reduce current consumption and to generate a fast slew rate. Various methods are employed to address this issue, and one of the methods employed distributes charges to a panel by using a share line while the switch 120 is deactivated.